DocumentCode
3160501
Title
Static Timing Analysis of Dynamically Sensitizable Paths
Author
Perremans, S. ; Claesen, L. ; Man, H. De
Author_Institution
IMEC, Interuniversity Micro Electronics Center, VSDM division, 3030 Leuven, Belgium
fYear
1989
fDate
25-29 June 1989
Firstpage
568
Lastpage
573
Abstract
This paper describes a new method for solving the false path problem in static timing analysis of acyclic, combinational circuits. The conditions under which a path is false are accurately defined. The fact that these conditions explicitly take into account the dynamic behaviour of the circuit, constitutes the main contribution of the paper. An algorithm for computing the longest dynamically sensitizable paths in an acyclic, combinational circuit is presented.
Keywords
Algorithm design and analysis; Circuit analysis computing; Clocks; Combinational circuits; Delay; Logic; MOSFETs; Switches; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1989. 26th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-310-8
Type
conf
DOI
10.1109/DAC.1989.203459
Filename
1586443
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