Highly alignment tolerant InGaAs inverted MSM photodetector heterogeneously integrated on a differential Si CMOS receiver operating at 1 Gbps

The increasing demand for high bandwidth, low latency I/O in gigascale systems is challenging current packaging technology. Optoelectronic I/O offers needed performance, but presents new challenges in mixed signal (digital, analog, optical, RF) design and test. In addition, the integration of OE interconnect must be suitable for high volume, low cost manufacturing of digital systems. This paper explores the heterogeneous integration of very large area, highly alignment tolerant photodetectors onto Si CMOS differential analog receiver circuits to realize noise-tolerant receiver interfaces for high-density interconnection electrical substrates with integrated optical links as well as for fiber optic links. The realization of an optically interconnected microprocessor that employs such a photodetector will also be discussed