• DocumentCode
    3162131
  • Title

    Explicit construction for reliable reconfigurable array architectures

  • Author

    Sha, Edwin Hsing-Mean ; Steiglitz, Kenneth

  • Author_Institution
    Dept. of Comput. Sci., Princeton Univ., NJ, USA
  • fYear
    1991
  • fDate
    2-5 Dec 1991
  • Firstpage
    640
  • Lastpage
    647
  • Abstract
    This paper describes some explicit constructions for reconfigurable array architectures. Given a working architecture (application graph), the authors add redundant hardware to increase reliability. The degree of reconfigurability, DR, of a redundant graph is a measure of the cost of reconfiguration after failures. When DR is independent of the size of the application graph, the authors say the graph is finitely reconfigurable, FR. They present a class of simple layered graphs with a logarithmic number of redundant edges, which can maintain both finite reconfigurability and a fixed level of reliability for a wide class of application graphs. By sacrificing finite reconfigurability, they show that by using expanders they can construct highly reliable structures with the asymptotically optimal number of edges for one-dimensional and tree-like array architectures
  • Keywords
    fault tolerant computing; parallel architectures; redundant hardware; reliability; reliable reconfigurable array architectures; Boolean functions; Computer architecture; Concurrent computing; Fault tolerance; Maintenance; Parallel processing; Pipelines; Switches; Throughput; Tree graphs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on
  • Conference_Location
    Dallas, TX
  • Print_ISBN
    0-8186-2310-1
  • Type

    conf

  • DOI
    10.1109/SPDP.1991.218202
  • Filename
    218202