• DocumentCode
    3162345
  • Title

    Macrocell design techniques that ease system level ASIC integration

  • Author

    Harrington, John T. ; Thompson, Dave W. ; Tsay, Mean-sea

  • Author_Institution
    Lucent Technol. Inc., Allentown, PA, USA
  • fYear
    1996
  • fDate
    23-27 Sep 1996
  • Firstpage
    3
  • Lastpage
    6
  • Abstract
    With the tremendous advances in process technology, ASIC integration capability has reached new levels that allow for developing complete systems on a chip, or system level ASICs. However, just because the silicon capabilities allow for these system level ASICs, there are a number of other capabilities that are required to successfully implement these designs. One such capability is the use of macrocells functions to increase the level of integration. This paper discusses the challenges in designing macrocell functions to ease the ASIC integration process and some of the approaches used by the Microelectronics Group at Lucent Technologies (formerly AT&T Microelectronics) to overcome these challenges
  • Keywords
    application specific integrated circuits; cellular arrays; circuit CAD; integrated circuit design; CAD; macrocell design techniques; macrocell functions; system level ASIC integration; Application specific integrated circuits; Costs; Electronics industry; Integrated circuit technology; Logic; Macrocell networks; Microelectronics; Packaging; Productivity; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International
  • Conference_Location
    Rochester, NY
  • ISSN
    1063-0988
  • Print_ISBN
    0-7803-3302-0
  • Type

    conf

  • DOI
    10.1109/ASIC.1996.551950
  • Filename
    551950