mm-Wave and Logic Acceleration Techniques for 100 Gbit Decision Feedback Equalizer

Author

Awny, A. ; Thiede, A. ; Korndörfer, F. ; Scheytt, J. Christoph

Author_Institution

Dept. of High-Freq. Electron., Univ. of Paderborn, Paderborn

fYear

2009

fDate

16-18 March 2009

Firstpage

1

Lastpage

4

Abstract

The design of very high speed broadband latched comparators in 0.13-mum SiGe bipolar technology is presented. The comparators are used as a broadband front-end of a 1-tap decision feedback equalizer (DFE) for 100 Gb/s optical communication. Techniques for measuring the bandwidth of the designed comparators are presented. Measurement results show a 3 dB bandwidth of about 45.5 GHz. A half rate parallel look-ahead architecture is used for the implementation of the DFE with modifications to relax the timing constraints of its components.

Keywords

comparators (circuits); decision feedback equalisers; flip-flops; microwave photonics; optical communication equipment; optical fibre communication; timing; DFE; SiGe bipolar technology; bit rate 100 Gbit/s; broadband latched comparators; decision feedback equalizer; parallel look-ahead architecture; size 0.13 mum; timing constraints; Acceleration; Bandwidth; Decision feedback equalizers; Germanium silicon alloys; Intersymbol interference; Latches; Logic; Optical feedback; Optical receivers; Silicon germanium; CD; DFE; ECL; ISI; PMD; SiGe;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2009 German

Conference_Location

Munich

Print_ISBN

978-3-9812668-0-1

Electronic_ISBN

978-3-8007-3150-3

Type

conf

DOI

10.1109/GEMIC.2009.4815884

Filename

4815884