DocumentCode
3162571
Title
A novel low-stress driven technique for on-panel TFT gate driver
Author
Huang, Nan Xiong ; Shiau, Miin Shyue ; Chen, Po Hung ; Wu, Hong-Chong ; Hsu, Heng-Shou ; Liu, Don Gey
Author_Institution
Grad. Inst. of Electr. & Commun. Eng., Feng Chia Univ., Taichung, Taiwan
fYear
2011
fDate
8-10 Aug. 2011
Firstpage
3675
Lastpage
3678
Abstract
In this paper, we propose a novel low-stress technique on-panel display gate driver. In the past, our group proposed the gate driver consists of dual pull-down, anti-fluctuating, flash pull-down transistor and low driving voltage design. This would make the circuit area too large. Therefore, we only solve the stress effect of pull down transistor. The novel circuit not only reduce 46% circuit area but also maintain the same lifetime of gate driver.
Keywords
driver circuits; stress effects; thin film circuits; thin film transistors; antifluctuating transistor; dual pull-down transistor; flash pull-down transistor; low driving voltage design; low-stress driven technique; on-panel TFT display gate driver; Logic gates; Noise; Stress; Thin film transistors; Threshold voltage; Voltage control; gate driver; low-stress technique; stress effect;
fLanguage
English
Publisher
ieee
Conference_Titel
Artificial Intelligence, Management Science and Electronic Commerce (AIMSEC), 2011 2nd International Conference on
Conference_Location
Deng Leng
Print_ISBN
978-1-4577-0535-9
Type
conf
DOI
10.1109/AIMSEC.2011.6010009
Filename
6010009
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