Real-time implementation of speech recognition using RISC processor core

Author

Chang, Ching-Tang ; Chang, Chung-Tze ; Huang-Lin Yang ; Chang, Hwai-Tsu

Author_Institution

Comput. & Commun. Labs., Ind. Technol. Res. Inst., Hsinchu, Taiwan

fYear

1996

fDate

23-27 Sep 1996

Firstpage

231

Lastpage

234

Abstract

A general application processor with analog interface, based on a RISC processor core, for speech recognition applications has been designed and implemented. The system, designed for large vocabulary applications, integrates speech analysis, feature extraction and pattern recognition, to achieve high recognition performance at low cost. Other speech processing can also utilize the flexible architecture to perform speech compression and synthesis tasks. With these capabilities, more intelligent human interface applications can then be easily derived

Keywords

feature extraction; real-time systems; reduced instruction set computing; speech coding; speech processing; speech recognition; speech recognition equipment; RISC processor core; feature extraction; flexible architecture; large vocabulary applications; pattern recognition; real-time implementation; speech analysis; speech compression; speech processing; speech recognition; speech synthesis; Costs; Feature extraction; Humans; Pattern recognition; Reduced instruction set computing; Speech analysis; Speech processing; Speech recognition; Speech synthesis; Vocabulary;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Conference_Location

Rochester, NY

ISSN

1063-0988

Print_ISBN

0-7803-3302-0

Type

conf

DOI

10.1109/ASIC.1996.552000

Filename

552000