• DocumentCode
    3164214
  • Title

    An asynchronous multiplier

  • Author

    Luderman, Brenda ; Albicki, Alexander

  • Author_Institution
    Dept. of Electr. Eng., Rochester Univ., NY, USA
  • fYear
    1992
  • fDate
    28-29 Feb 1992
  • Firstpage
    104
  • Lastpage
    108
  • Abstract
    This paper discusses the design and performance of an 8-bit asynchronous multiplier. Self-timed adders with carry completion signals were implemented to create the asynchronous function of the multiplier. The technique of using bi-directional adders is incorporated in the design. One objective of this design was to estimate the longest multiplication time for a 2 μm CMOS implementation of this 8-bit multiplier
  • Keywords
    CMOS integrated circuits; digital arithmetic; multiplying circuits; 8 bit; CMOS implementation; asynchronous multiplier; carry completion signals; design; performance; self timed adders; Bidirectional control; CMOS logic circuits; Clocks; Signal analysis; Switches; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
  • Conference_Location
    Kalamazoo, MI
  • Print_ISBN
    0-8186-2610-0
  • Type

    conf

  • DOI
    10.1109/GLSV.1992.218358
  • Filename
    218358
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3164214