Design of millimeter-wave mixed signal circuits in 45nm SOI CMOS

Author

Popp, Jeremy D. ; Kormanyos, B. ; Adams, M. ; Hurtado, A. ; Braatz, J. ; Wolfhausen, C. ; McKay, T.

Author_Institution

Boeing Res. & Technol., Seattle, WA, USA

fYear

2010

fDate

11-14 Oct. 2010

Firstpage

1

Lastpage

2

Abstract

This work details the benefits of ultra deep submicron (UDSM) SOI CMOS technology for high performance mixed signal circuits at mm-wave frequencies. In particular, a mm-wave Direct Digital Synthesizer (DDS) design in 45nm partially depleted (PD) SOI CMOS is presented with post extraction simulated performance of 32 Gsps sample rate that rivals state of the art III-V DDS performance. Technology benefits of the 45nm PD-SOI technology´s billion transistor integration, sub-5pS digital gate delays, and measured ~400GHz f_t/~200GHz f_max cutoff frequency performance is highlighted. Increasing design challenges for UDSM CMOS mm-wave mixed signal circuits caused by increased gate leakage, limited transistor output impedance, inadequate foundry models, and required checking for design manufacturability are also addressed.

Keywords

CMOS integrated circuits; millimetre wave circuits; silicon-on-insulator; cutoff frequency performance; design manufacturability; foundry model; millimeter-wave mixed signal circuit; mm-wave direct digital synthesizer design; mm-wave frequency; size 45 nm; transistor output impedance; ultra deep submicron SOI CMOS technology; CMOS integrated circuits; CMOS technology; Integrated circuit modeling; Layout; Leakage current; Semiconductor device modeling; Semiconductor process modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference (SOI), 2010 IEEE International

Conference_Location

San Diego, CA

ISSN

1078-621x

Print_ISBN

978-1-4244-9130-8

Electronic_ISBN

1078-621x

Type

conf

DOI

10.1109/SOI.2010.5641062

Filename

5641062