Estimation of maximum power for CMOS combinational circuits using tabu-hierarchy genetic algorithm

With the high demand for reliability and performance, it is essential to determine an accurate estimation of maximum CMOS combinational circuit power consumption. However, for large-scaled circuits, the problem of determining the input patterns to induce maximum current and the maximum power is NP-complete. In this paper, a novel approach was proposed to obtain a lower bound of the maximum power consumption using a THGA (tabu-hierarchy genetic algorithm). The experiments with ISCAS85 benchmark circuits show that this approach generates the lower bound with a quality that cannot be achieved using simulation-based techniques and other methods.