• DocumentCode
    3169183
  • Title

    Comprehensive analysis of serpentine line design

  • Author

    Wei-Shan Soh ; Kye-Yak See ; Chang, R.W.-Y. ; Oswal, Manish ; Lin-Biao Wang

  • Author_Institution
    Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2009
  • fDate
    7-10 Dec. 2009
  • Firstpage
    1285
  • Lastpage
    1288
  • Abstract
    Serpentine lines have been widely used in digital circuits to provide the required timing delays. Based on a full-wave simulation tool, some critical parameters that affect the delay characteristic of a serpentine line are carefully studied and analyzed. With the comprehensive study and analysis, a set of practical and useful design guides are concluded for designing a serpentine line to meet the delay specification.
  • Keywords
    delays; digital integrated circuits; integrated circuit design; comprehensive analysis; digital integrated circuits; full-wave simulation tool; serpentine line design; timing delays; Analytical models; Circuit simulation; Circuits and systems; Dielectric constant; Dielectric measurements; Digital integrated circuits; Impedance; Laboratories; Propagation delay; Timing; cross-coupling; delay line; meander; serpentine;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Conference, 2009. APMC 2009. Asia Pacific
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-2801-4
  • Electronic_ISBN
    978-1-4244-2802-1
  • Type

    conf

  • DOI
    10.1109/APMC.2009.5384455
  • Filename
    5384455