DocumentCode
3175209
Title
An Automatic Approach to Model Checking UML State Machines
Author
Zhang, Shao Jie ; Liu, Yang
Author_Institution
NUS Grad. Sch. for Integrative Sci. & Eng., Nat. Univ. of Singapore, Singapore, Singapore
fYear
2010
fDate
9-11 June 2010
Firstpage
1
Lastpage
6
Abstract
UML has become the dominant modeling language in software engineering arena. In order to reduce cost induced by design issues, it is crucial to detect model-level errors in the initial phase of software development. In this paper, we focus on the formal verification of dynamic behavior of UML diagrams. We present an approach to automatically verifying models composed of UML state machines. Our approach is to translate UML models to the input language of our home grown model checker PAT in such a way as to be transparent for users. Compared to previous efforts, our approach supports a more complete subset of state machine including fork, join, history and submachine features. It alleviates the state explosion problem by limiting the use of auxiliary variables. Additionally, this approach allows to check safety/liveness properties (with various fairness assumptions), trace refinement relationships and so on with the help of PAT.
Keywords
Unified Modeling Language; finite state machines; formal verification; simulation languages; software fault tolerance; PAT; UML; formal verification; model-level error; modeling language; software development; software engineering; state machine; trace refinement relationship; Costs; Encoding; Explosions; History; Phase detection; Programming; Reliability engineering; Software engineering; State-space methods; Unified modeling language; Model Checking; PAT; UML State Machines;
fLanguage
English
Publisher
ieee
Conference_Titel
Secure Software Integration and Reliability Improvement Companion (SSIRI-C), 2010 Fourth International Conference on
Conference_Location
Singapore
Print_ISBN
978-1-4244-7644-2
Type
conf
DOI
10.1109/SSIRI-C.2010.11
Filename
5521548
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