Evaluation of Sn-based microbumping technology for hybrid IR detectors, 10µm pitch to 5µm pitch

Hybridization of Infrared detectors has relied on Indium balling for the last decades. Whereas this well-established process has proven its reliability through out the years, it becomes challenging to further decrease the balling pitch below 10μm, due to balling volume limitation. In this study we developed a wafer level bumping process for 10 and 5 μm pitch Sn microbump. Different test materials with 10 and 5μm pitch Sn microbumps were processed to mimic 1024 X 768 (XGA) and 3072 X 3072 pixels formats respectively. We show that the 10μm pitch assemblies can undergo successfully 960 cycles between room temperature and cryogenic temperature, meeting stringent reliability requirements of such device. On the pitch scaling side, we show that initial 5μm pitch microbumps have been successfully fabricated, assembled and underfilled. The observed failure modes are discussed.