Perspectives on shallow junction technology from the viewpoint of the ITRS

The grand challenges to the semiconductor industry in continuing the scaling of planar CMOS devices are described in the International Technology Roadmap for Semiconductors. One of these challenges is the requirement for the continuing reduction of the junction depth of shallow junctions such as the drain extension. The key potential solutions to this challenge involve the continued development of doping and annealing technologies. This paper describes the challenges and the potential solutions of the ITRS. The potential solutions figure describes much of the efforts of the industry. Each of the key elements of this figure is described. This is reviewed in the context of the highest level advantages and issues associated with each particular technology.