DocumentCode
3181652
Title
VLSI Topology Synthesis Using the Method of Parallel Genetic Algorithms
Author
Kernytskyy, Andriy ; Kryvyy, Rostyslav ; Tkatchenko, Serhiy
Author_Institution
Lviv Polytech. Nat. Univ., Lviv
fYear
2007
fDate
23-26 May 2007
Firstpage
152
Lastpage
153
Abstract
A parallel implementation of a genetic algorithms used to design the VLSI circuits topology is described.
Keywords
VLSI; genetic algorithms; integrated circuit design; integrated circuit layout; network topology; VLSI layout; parallel genetic algorithm implementation; topology synthesis; Algorithm design and analysis; Analog circuits; Circuit synthesis; Circuit topology; Computational modeling; Concurrent computing; Design optimization; Digital circuits; Genetic algorithms; Very large scale integration; VLSI; layout; parallel genetic algorithm; synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Perspective Technologies and Methods in MEMS Design, 2007. MEMSTECH 2007. International Conference on
Conference_Location
Lviv-Polyana
Print_ISBN
978-966-553-614-7
Type
conf
DOI
10.1109/MEMSTECH.2007.4283452
Filename
4283452
Link To Document