Real time H.263 video codec using parallel DSP

Author

Lin, W. ; Goh, K.H. ; Tye, B.J. ; Powell, G.A. ; Ohya, T. ; Adachi, S.

Author_Institution

Inst. of Microelectron., Microelectron. Syst. Applications, Singapore

Volume

2

fYear

1997

fDate

26-29 Oct 1997

Firstpage

586

Abstract

The H.263 video codec is an improved version of H.261 and is a constituent part of the H.324 video-conferencing codec suite. A system implementing a real-time ITU-T H.263 codec using a multi-processor DSP system has been configured by the authors. This paper describes the implementation scheme and additionally, some programming techniques to exploit the internal architecture of the multimedia video processor (MVP), and some strategies introduced to reduce the computational complexity whilst minimizing degradation of picture quality. The effects of these strategies have been tested and the codec performance are reported. The video codec is integrated with the G.723.1, H.223 and H.245 to form a full-duplex video-conferencing system

Keywords

computational complexity; digital signal processing chips; multimedia communication; parallel architectures; real-time systems; teleconferencing; video codecs; G.723.1; H.223; H.245; H.263 video codec; computational complexity; full-duplex video-conferencing system; internal architecture; multi-processor DSP system; multimedia video processor; parallel DSP; picture quality; programming techniques; real-time ITU-T codec; Computational complexity; Computer architecture; Decoding; Degradation; Digital signal processing; Digital signal processing chips; Displays; Microelectronics; Microprogramming; Random access memory; Real time systems; Switches; Testing; Video codecs; Weight control;

fLanguage

English

Publisher

ieee

Conference_Titel

Image Processing, 1997. Proceedings., International Conference on

Conference_Location

Santa Barbara, CA

Print_ISBN

0-8186-8183-7

Type

conf

DOI

10.1109/ICIP.1997.638839

Filename

638839