DocumentCode
318400
Title
A simulation-based JTAG ATPG optimized for MCMS
Author
Flint, Andrew
Author_Institution
AT&T Wireless Services, Redmond, WA, USA
fYear
1997
fDate
1-6 Nov 1997
Firstpage
101
Lastpage
105
Abstract
Boundary scan test generation tools generate tests based on the netlist of the design. Netlist-based tools are very efficient in designs with a high percentage of boundary scan devices, but can be inefficient in designs containing a significant percentage of non-compatible ICs. An alternative method, in which the user defines the nets to test, is explored
Keywords
automatic test equipment; automatic testing; boundary scan testing; digital simulation; fault diagnosis; multichip modules; printed circuit testing; JTAG ATPG; MCM; PCB; boundary scan devices; boundary scan test generation; netlist-based tools; noncompatible IC; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Databases; Fault diagnosis; Integrated circuit interconnections; Printed circuits; System testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1997. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-4209-7
Type
conf
DOI
10.1109/TEST.1997.639600
Filename
639600
Link To Document