ProTest: a low cost rapid prototyping and test system for ASICs and FPGAs

Author

Jacomet, Marcel ; Wälti, Roger ; Winzenried, Lukas ; Perez, Jaime ; Gysel, Martin

Author_Institution

Biel Sch. of Eng., MicroLab, Biel, Switzerland

fYear

1997

fDate

17-19 Nov 1997

Firstpage

138

Lastpage

142

Abstract

The test bench methodology helps the design engineer to structure the simulation of his circuit. As showed in this paper, the test bench methodology can further be developed in order to efficiently reuse simulation stimuli and response for the real device under test. As FPGAs are very often used to prototype an ASIC design, an easy switch between simulation and real hardware test is necessary to establish a rapid prototyping design and test environment. Our ProTest system closes the gap between the simulation and the test environment with a low cast and easy to use computer-aided-test environment

Keywords

VLSI; application specific integrated circuits; automatic test software; field programmable gate arrays; logic design; software prototyping; ASIC; ASIC design; FPGA; ProTest system; computer-aided-test; hardware test; rapid prototyping; simulation; test bench; Circuit simulation; Circuit testing; Computational modeling; Costs; Design engineering; Design methodology; Prototypes; Switches; System testing; Virtual prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian

Conference_Location

Akita

ISSN

1081-7735

Print_ISBN

0-8186-8209-4

Type

conf

DOI

10.1109/ATS.1997.643949

Filename

643949