Specification and design of a general purpose image processing chip

The computational and communication requirements of a wide range of image processing algorithms were analysed and used to specify the design of a general purpose image processing device. The algorithms considered are restricted to image-in and image or feature-out type algorithms. These algorithms are categorised by the demands that they would place on a hardware architecture. We conclude that the major consideration is the off-chip input/output limitation which needs to be able to exploit redundancy in both the data and processor instructions. This paper summarises: the main conclusions of this work, an architecture which we have designed in an attempt to meet the identified constraints and how it differs from previous attempts