• DocumentCode
    3191592
  • Title

    Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations

  • Author

    Li, Xin ; Cao, Yu

  • Author_Institution
    Carnegie Mellon Univ., Pittsburgh
  • fYear
    2008
  • fDate
    17-19 March 2008
  • Firstpage
    108
  • Lastpage
    113
  • Abstract
    Large-scale process fluctuations (particularly random device mismatches) at nanoscale technologies bring about high-dimensional strongly nonlinear performance variations that cannot be accurately captured by linear or quadratic response surface models. In this paper, we propose a novel projection-based piecewise linear modeling technique, P2M, to address such a modeling challenge with affordable computational cost. P2M borrows the projection pursuit idea from mathematics to convert a high-dimensional modeling problem to a low-dimensional one. In addition, a new piecewise-linear model template is proposed and tuned for strongly nonlinear performance variations. By exploiting the unique piecewise-linear nature of the model template, a robust numerical algorithm is further developed to determine all model coefficients by solving a sequence of over-determined linear equations. Several circuit examples designed in a commercial 65 nm CMOS process demonstrate that compared with the traditional quadratic modeling, P2M achieves 2x error reduction with negligible computational overhead.
  • Keywords
    CMOS integrated circuits; VLSI; integrated circuit modelling; nanoelectronics; piecewise linear techniques; CMOS process; error reduction; large-scale process fluctuations; nanoscale technologies; nonlinear VLSI performance variations; piecewise-linear response surface modeling; projection-based piecewise linear modeling algorithm; quadratic response surface models; robust numerical algorithm; size 65 nm; traditional quadratic model comparison; Computational efficiency; Fluctuations; Large-scale systems; Mathematical model; Mathematics; Nanoscale devices; Piecewise linear techniques; Response surface methodology; Semiconductor device modeling; Very large scale integration; Performance modeling; process variations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-0-7695-3117-5
  • Type

    conf

  • DOI
    10.1109/ISQED.2008.4479708
  • Filename
    4479708