DocumentCode

3192531

Title

The paper deals with the following topics: electronic design automation; post-silicon validation; resistor-transistor logic; SystemC; embedded software timing; thermal management; advanced clock design; flip-chip layout; pre-silicon validation; embedded system virtualization; design space exploration; interconnect networks; formal verification; routing; variability problem; circuit integrity; circuit reliability; silicon-to-model correlation; circuit placement; network-on-chips; concurrency control; data access; leakage estimation; leakage optimization; logic synthesis; embedded hardware; circuit simulation; static RAM; cyber-physical systems; power management; high-level synthesis; analog circuit modeling; and smart power.

Keywords

C language; SRAM chips; analogue circuits; concurrency control; electronic design automation; embedded systems; flip-chip devices; formal verification; high level synthesis; logic circuits; logic design; multiprocessing systems; network routing; network-on-chip; power aware computing; power consumption; virtual machines; SystemC; advanced clock design; analog circuit modeling; circuit integrity; circuit placement; circuit reliability; circuit simulation; concurrency control; cyber-physical systems; data access; design space exploration; electronic design automation; embedded hardware; embedded software timing; embedded system virtualization; flip-chip layout; formal verification; high-level synthesis; interconnect networks; leakage estimation; leakage optimization; logic synthesis; network-on-chips; post-silicon validation;; power management; pre-silicon validation; resistor-transistor logic; routing; silicon-to-model correlation; smart power; static RAM; thermal management; variability problem;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference (DAC), 2010 47th ACM/IEEE

Conference_Location

Anaheim, CA

ISSN

0738-100X

Print_ISBN

978-1-4244-6677-1

Type

conf

Filename

5522730

Table of contents

conf