DocumentCode
3192653
Title
2001 6th International Symposium on Plasma- and Process-Induced Damage (IEEE Cat. No.01TH8538)
fYear
2001
fDate
13-15 May 2001
Abstract
This year the scope of the conference was expanded. In addition to plasma related damage, degradation of devices and circuits resulting from non-plasma sources was included to cover all process-induced phenomena that influence the electrical behavior of silicon devices and circuits. Consequently P2ID will now also be the premier forum for the latest work in the field of contamination assessment and management; this is becoming more important in modern metallization schemes and for the material innovations required for the fabrication of novel non-volatile memory products such as FeRAMS and MRAMS. The interconnect crisis is addressed and such topics as low-κ intermetal dielectrics, D2 annealing, contamination risk in silicon technology, and high-κ dielectrics are covered.
Keywords
dielectric thin films; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated memory circuits; plasma applications; contamination assessment; electrical behavior; high-/spl kappa/ dielectrics; interconnect; low-/spl kappa/ intermetal dielectrics; metallization schemes; nonvolatile memory products; plasma related damage; process-induced phenomena;
fLanguage
English
Publisher
ieee
Conference_Titel
Plasma- and Process-Induced Damage, 2001 6th International Symposium on
Conference_Location
Monterey, CA, USA
Print_ISBN
0-9651577-5-X
Type
conf
DOI
10.1109/PPID.2001.929963
Filename
929963
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