Electromigration testing on via line structures with fast wafer level tests in comparison to standard package level tests

Author

Zitzelsberger, Anke ; Bauer, Robert ; Hagen, Jochen V. ; Lepper, Marco ; Pietsch, Andreas

Author_Institution

Infineon Technol. AG, Munich, Germany

fYear

2001

fDate

6-6 June 2001

Firstpage

180

Lastpage

182

Abstract

Experimental results show a good correlation between fast wafer level tests (WL) and conventional standard package level (PL) tests on via-line structures. Failure analysis show the same failure mechanism and no differences in the shape factor of the failure distributions. Similar t_50N values are obtained, after extrapolating the data to operation conditions. As a consequence fast wafer level tests can not only be used for monitoring but also to quantify the reliability of metallization, if suitable stress conditions are used.

Keywords

electromigration; extrapolation; failure analysis; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; electromigration testing; extrapolation; failure analysis; failure distributions; failure mechanism; fast wafer level tests; metallization; monitoring; reliability; shape factor; standard package level tests; stress conditions; via line structures; Condition monitoring; Current density; Electromigration; Failure analysis; Life estimation; Packaging; Stress; Temperature; Testing; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International

Conference_Location

Burlingame, CA, USA

Print_ISBN

0-7803-6678-6

Type

conf

DOI

10.1109/IITC.2001.930053

Filename

930053