DocumentCode
3210560
Title
High-speed parallel input-output bit-sliced fault-tolerant convolvers
Author
Dadda, Luigi ; Sami, Mariagiovanna
Author_Institution
Dipartimento di Elettronica, Politecnico di Milano, Italy
fYear
1992
fDate
4-6 Nov 1992
Firstpage
287
Lastpage
296
Abstract
A family of convolvers for high sample rate is proposed, based on the composition of subconvolvers characterized by one bit samples and by modular, regular structures decomposable in identical bit-slices. Samples are represented in parallel or in skew form and the whole circuit is a sequential circuit whose combinatorial part is an array of full adders, assuring a high sampling rate. Fault tolerance provisions are also discussed
Keywords
adders; bit-slice computers; digital signal processing chips; sequential circuits; bit-sliced fault-tolerant convolvers; full adders; one bit samples; parallel input-output; regular structures; sample rate; sequential circuit; skew form; subconvolvers; Adders; Arithmetic; Convolution; Convolvers; Digital signal processing; Fault tolerance; Fourier transforms; Sampling methods; Sequential circuits; Signal sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 1992. Proceedings., 1992 IEEE International Workshop on
Conference_Location
Dallas, TX
ISSN
1550-5774
Print_ISBN
0-8186-2837-5
Type
conf
DOI
10.1109/DFTVS.1992.224346
Filename
224346
Link To Document