DocumentCode
3213159
Title
CMOS transistor electrical ageing experiments to build VHDL-AMS behavioral models
Author
Mongellaz, Benoit ; Marc, Frau ; Danto, Yves
Author_Institution
Lab. IXL, Bordeaux I Univ., Talence, France
fYear
2004
fDate
25-29 April 2004
Firstpage
649
Lastpage
650
Abstract
This paper presents an experimental case study of CMOS technology ageing. Our approach is based on a methodology that implies experimental tests to evaluate electrical ageing effects on MOSFET. The experimental data set is used to build a MOSFET device ageing VHDL-AMS model. Then, this ageing model is used to build an OTA ageing VHDL-AMS model. This two electrical ageing models are respectively used in simulation to evaluate ageing effects on electrical performances.
Keywords
CMOS integrated circuits; MOSFET; ageing; electric breakdown; integrated circuit reliability; semiconductor device breakdown; semiconductor device reliability; CMOS transistor electrical ageing experiments; VHDL-AMS behavioral models; electrical ageing effects; Aging; CMOS technology; Circuit simulation; Equations; Failure analysis; MOSFET circuits; Physics; Predictive models; Semiconductor device modeling; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
Print_ISBN
0-7803-8315-X
Type
conf
DOI
10.1109/RELPHY.2004.1315433
Filename
1315433
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