Evolutionary test program induction for microprocessor design verification

Author

Corno, Fulvio ; Cumani, Gianluca ; Reorda, Matteo Sonza ; Squillero, Giovanni

Author_Institution

Dipt. di Automatica e Informatica, Politecnico di Torino, Italy

fYear

2002

fDate

18-20 Nov. 2002

Firstpage

368

Lastpage

373

Abstract

Design verification is a crucial step in the design of any electronic device. Particularly when microprocessor cores are considered, devising appropriate test cases may be a difficult task. This paper presents a methodology able to automatically induce a test program for maximizing a given verification metric. The methodology is based on an evolutionary paradigm and exploits a syntactical description of microprocessor assembly language and an RT-level functional model. Experimental results show the effectiveness of the approach.

Keywords

automatic testing; circuit CAD; circuit simulation; computer testing; evolutionary computation; formal verification; high level synthesis; integrated circuit design; microprocessor chips; program assemblers; RT-level functional model; evolutionary paradigm; evolutionary test program induction; microprocessor assembly language; microprocessor cores; microprocessor design verification; syntactical description; verification metric; Automatic testing; Circuit simulation; Circuit testing; Costs; Debugging; Error correction; Integrated circuit testing; Microprocessors; Radio access networks; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian

ISSN

1081-7735

Print_ISBN

0-7695-1825-7

Type

conf

DOI

10.1109/ATS.2002.1181739

Filename

1181739