DocumentCode
3220522
Title
Computing stress tests for interconnect defects
Author
Dabholkar, Vinay ; Chakravarty, Sreejit
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1997
fDate
17-19 Nov 1997
Firstpage
143
Lastpage
148
Abstract
Reliability screens are used to reduce infant mortality. The quality of the stress test set used during. The screening process has a direct bearing on the effectiveness of the screen. We have formally studied the problem of computing good quality stress tests for some commonly occurring defects like gate-oxide shorts and interconnect defects. Methods to compute stress tests for gate-oxide defects have been discussed elsewhere. Here we present a formal study of the problem of computing stress rests for interconnect defects
Keywords
automatic test software; circuit analysis computing; fault location; integrated circuit interconnections; integrated circuit testing; integrated logic circuits; logic testing; sequential circuits; short-circuit currents; gate-oxide defects; infant mortality; interconnect defects; reliability screens; stress tests; Computer science; Integrated circuit testing; Large scale integration; Logic; Low voltage; Manufacturing; Production; Stress; Temperature; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian
Conference_Location
Akita
ISSN
1081-7735
Print_ISBN
0-8186-8209-4
Type
conf
DOI
10.1109/ATS.1997.643950
Filename
643950
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