Design of Minimum SOPC System Board

Author

Xiong Guohai ; Dong Fangmin ; Liu Yong

Author_Institution

Inst. of Intell. Vision & Image Inf., China Three Gorges Univ., Yichang

Volume

2

fYear

2008

fDate

20-22 Oct. 2008

Firstpage

20

Lastpage

24

Abstract

A minimum development system based SOPC is designed as well as the design thought of the system and its realization way are explained. With a PFGA as the core, this system has compact structure and embodies the characteristics of SOPC system such as high integration and strong flexibility. The cheaper chip with excellent interchangeability is selected and used in the design plan to reduce the cost. The functional test and application verification are carried out for the system board and the results are in accordance with the design requirements.

Keywords

development systems; field programmable gate arrays; logic design; logic testing; system-on-chip; FPGA; application verification; functional test; minimum SOPC system board design; minimum development system; Circuit testing; Clocks; Computer displays; Costs; Data acquisition; Field programmable gate arrays; Physics computing; Pins; Read-write memory; Voltage; DDS; FPGA; Nios?; SOPC; System Board;

fLanguage

English

Publisher

ieee

Conference_Titel

Intelligent Computation Technology and Automation (ICICTA), 2008 International Conference on

Conference_Location

Hunan

Print_ISBN

978-0-7695-3357-5

Type

conf

DOI

10.1109/ICICTA.2008.37

Filename

4659714