Delay analysis of gate-adjusted CNTFETs for undeposited CNT defect-tolerance

The Carbon NanoTube Field Effect Transistor (CNTFET) is a promising device to supersede the MOSFET at the end of the technology roadmap of CMOS. One of the likely defect types that may occur in the manufacturing process is that the diameter of a CNT could be changed and not all CNTs are deposited. This paper deals with the degradation scenario in which different CNT parameters (the diameter, the number, and the position of the CNTs) affect the delay through the CNTFET. A solution to mitigate the change in delay is proposed; this approach is based on adjusting the gate width as part of the fabrication process for the CNTFET. Two methods as related to reducing the average delay as well as the deviation (the change of delay due to the position of the undeposited CNTs) are proposed and analyzed for different values of diameter. The first method reduces on average the delay by 7.01% but the deviation is increased by 32.94%. The second method reduces on average the deviation by 43.97% with 2.11% delay reduction.