Parallel structures for the decomposition of symmetric matrices

A systematic method is developed for improving the efficiency of systolic structures designed for the solution of sets of simultaneous linear equations. The method uses the concept of a timing graph to display the evolution of computations in an array as a function of the compute cycle. Timing graph decoupling is used to determine structured sparsity patterns that are executable more efficiently in such arrays. The results are extended to cover symmetric matrices. It is shown that timing graph decoupling identifies the structure of sparse symmetric matrices executable in dense arrays in reduced time with no fill-in