Modeling of Defect Evolution and TED under Stress based on DFT Calculations

Author

Guo, HsiuWu ; Dunham, Scott T. ; Shih, ChenLuen ; Ahn, Chihak

Author_Institution

Dept. of Electr. Eng., Univ. of Washington, Seattle, WA

fYear

2006

fDate

6-8 Sept. 2006

Firstpage

71

Lastpage

74

Abstract

The incorporation of strain in order to improve mobility has become an important element in CMOS device scaling. In this work, we have developed a new moment-based model of extended defect kinetics and further studied the impact due to stress on the energies of impurities, point defects and particularly extended defects. We specifically look at point defect clusters which control transient enhanced diffusion (TED). The results enable comprehensive models for dependence of nanoscale device structures on stress which can be used for process optimization

Keywords

carrier mobility; density functional theory; impurity distribution; interstitials; semiconductor process modelling; stress effects; CMOS device scaling; DFT calculations; carrier mobility; extended defect kinetics; interstitials; moment-based model; nanoscale device structures; point defect clustering; stress effects; transient enhanced diffusion; Annealing; Capacitive sensors; Impurities; Ion implantation; Kinetic theory; Materials science and technology; Physics; Semiconductor device modeling; Silicon; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices, 2006 International Conference on

Conference_Location

Monterey, CA

Print_ISBN

1-4244-0404-5

Type

conf

DOI

10.1109/SISPAD.2006.282841

Filename

4061584