An asymmetrical half bridge flyback converter with zero-voltage and zero-current switching

In this paper, the analysis and design of an asymmetrical half bridge flyback DC-DC converter is presented, which can minimize the switching power loss by realizing the zero-voltage switching (ZVS) during the transition between the two switches and the zero-current-switching (ZCS) on the output diode. As a result, high efficiency can be achieved. The principle of the converter operation is explained and analyzed. In order to ensure the realization of ZVS in operation, the required interlock delay time between the gate signals of the two switches, the transformer leakage inductance, and the ZVS range of the output current variation are properly calculated. Experimental results from a 8 V/8 A, 200 kHz circuit are also presented, which verify the theoretical analysis.