Verification of Digitally Calibrated Analog Systems with Verilog-AMS Behavioral Models

This paper describes the use of behavioral models to verify the design of digitally calibrated analog/mixed-signal systems, too large for either a circuit simulator or a traditional digital simulator. An important goal of using models in this way is to reduce the likelihood of human error resulting in integrated circuit imperfections. A specific example of a calibrated gain stage, with a full set of behavioral models illustrates the modeling and simulation approach