An incremental PGA architecture for STBC MIMO decoding

Author

Colavito, Leonard ; Silage, Dennis

Author_Institution

Dept. of Electr. & Comput. Eng., Temple Univ., Temple, TX

fYear

2009

fDate

March 30 2009-April 1 2009

Firstpage

1

Lastpage

4

Abstract

Space-time block codes (STBC) are desirable for use in multiple-input multiple-output (MIMO) communications systems because they can be decoded using only linear computations involving multiplication and addition. However, the number of simple operations and storage required may not be trivial for practical applications. This paper describes a method of implementing STBC MIMO decoding in programmable gate array (PGA) hardware using an incremental approach that reduces resource and storage requirements as compared to a direct implementation. A three antenna rate-frac12 STBC code is used as an example, but the techniques are readily applicable to other codes.

Keywords

MIMO communication; block codes; decoding; field programmable gate arrays; matrix algebra; space-time codes; STBC MIMO decoding; multiple-input multiple-output communications system; programmable gate array hardware; space-time block codes; Additive white noise; Block codes; Communication channels; Computer architecture; Electronics packaging; Equations; MIMO; Maximum likelihood decoding; Receiving antennas; Transmitting antennas;

fLanguage

English

Publisher

ieee

Conference_Titel

Sarnoff Symposium, 2009. SARNOFF '09. IEEE

Conference_Location

Princeton, NJ

Print_ISBN

978-1-4244-3381-0

Electronic_ISBN

978-1-4244-3382-7

Type

conf

DOI

10.1109/SARNOF.2009.4850286

Filename

4850286