DocumentCode
3237211
Title
Performance-Driven Floorplanning Technique Based on Collaboration of Software and Hardware
Author
Yoshikawa, Masaya ; Fukui, Masahiro ; Terai, Hidekazu
Author_Institution
Dept. of VLSI Syst. Design, Ritsumeikan Univ., Shiga
fYear
2005
fDate
5-7 Sept. 2005
Firstpage
222
Lastpage
226
Abstract
The floorplanning problem is an essential design step in VLSI layout design and it is how to place rectangular modules as density as possible. In this paper, we proposed a novel performance driven floorplanning technique. The proposed algorithms based on genetic algorithm (GA) is adopted to a sequence pair. The GA is one of the most powerful optimization methods based on the mechanics of natural evolution. However, the problem of the processing time stemming from a population based search exits in GA. In order to reduce the processing time, a novel technique of collaboration of software (SW) and hardware(HW) also is introduced. Experimental results evaluating the proposed algorithm are shown good performance.
Keywords
VLSI; circuit layout CAD; genetic algorithms; hardware-software codesign; integrated circuit layout; VLSI layout design; genetic algorithm; performance-driven floorplanning technique; software-hardware collaboration; Application software; Circuits; Collaboration; Collaborative software; Genetic algorithms; Hardware; Optimization methods; Routing; Software performance; Very large scale integration; Collaboration of SW and HW; Floorplanning; Genetic Algorithm; Performance-Driven;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2005. IDAACS 2005. IEEE
Conference_Location
Sofia
Print_ISBN
0-7803-9445-3
Electronic_ISBN
0-7803-9446-1
Type
conf
DOI
10.1109/IDAACS.2005.282974
Filename
4062125
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