DocumentCode
3240620
Title
A framework for security on NoC technologies
Author
Gebotys, Catherine H. ; Gebotys, Robert J.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fYear
2003
fDate
20-21 Feb. 2003
Firstpage
113
Lastpage
117
Abstract
Multiple heterogeneous processor cores, memory cores and application specific IP cores integrated in a communication network, also known as networks on chips (NoCs), will handle a large number of applications including security. Although NoCs offer more resistance to bus probing attacks, power/EM attacks and network snooping attacks are relevant. For the first time, a framework for security on NoC at both the network level (or transport layer) and at the core level (or application layer) is proposed. At the network level, each IP core has a security wrapper and a key-keeper core is included in the NoC, protecting encrypted private and public keys. Using this framework, unencrypted keys are prevented from leaving the cores and NoC. This is crucial to prevent untrusted software on or off the NoC from gaining access to keys. At the core level (application layer) the security framework is illustrated with software modification for resistance against power attacks with extremely low overheads in energy. With the emergence of secure IP cores in the market and nanometer technologies, a security framework for designing NoCs is crucial for supporting future wireless Internet enabled devices.
Keywords
industrial property; logic design; security of data; system-on-chip; telecommunication security; NoC technology security framework; SoC; application layer; application specific IP cores; bus probing attack resistance; communication network; core level security; encrypted private keys; key-keeper core; memory cores; multiple heterogeneous processor cores; network level security; network snooping attacks; networks on chips; power/EM attacks; public keys; security wrapper; system on a chip; transport layer; unencrypted keys; wireless Internet enabled devices; Algorithm design and analysis; Application software; Communication networks; Communication system security; Computer architecture; Hardware; Network-on-a-chip; Power system security; Protection; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on
Print_ISBN
0-7695-1904-0
Type
conf
DOI
10.1109/ISVLSI.2003.1183361
Filename
1183361
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