DocumentCode
3241587
Title
2001 6th International Workshop on Statistical Methodology (Cat. No.01TH8550)
fYear
2001
fDate
10-10 June 2001
Abstract
The influence of defects and process fluctuations upon VLSI yield is becoming increasingly crucial. Hence, statistical methodology is important for defect analysis and bridging between design and manufacturing. Treats robust designs for process and device, and applications of design-of-experiments (DOE). Session 2 deals with defect related yield and productivity control such as E-T data analysis. Session 3 addresses variability of circuits and interconnect
Keywords
VLSI; integrated circuit design; integrated circuit testing; integrated circuit yield; process control; statistical analysis; E-T data analysis; VLSI yield; circuit variability; defect analysis; defect related yield; design-of-experiments; process fluctuations; productivity control; robust designs; statistical methodology;
fLanguage
English
Publisher
ieee
Conference_Titel
Statistical Methodology, IEEE International Workshop on, 2001 6yh.
Conference_Location
Kyoto, Japan
Print_ISBN
0-7803-6688-3
Type
conf
DOI
10.1109/IWSTM.2001.933814
Filename
933814
Link To Document