Plasma damage impact on nMOS electrical characteristics during a CCS stress

Author

Pantisano, L. ; Paccagnelle, A. ; Colombo, P. ; Valentini, M.G.

Author_Institution

Dipt. di Elettronica e Inf., Padova Univ., Italy

fYear

1999

fDate

1999

Firstpage

Lastpage

Abstract

Plasma damage is generally evaluated by using suitable electrical stresses and characterisation techniques. Stress can induce both latent damage depassivation and new stress-induced defects. This work focuses on the stress depassivation kinetics of plasma damage in two different LDD-nMOSFETs, considering both oxide trapped charge and interface states

Keywords

MOSFET; electron traps; hole traps; interface states; plasma materials processing; semiconductor device reliability; semiconductor device testing; CCS stress; LDD-nMOSFETs; characterisation techniques; constant current stress; electrical stresses; interface states; latent damage depassivation; nMOS electrical characteristics; oxide trapped charge; plasma damage; stress depassivation kinetics; stress-induced defects; CMOS technology; Carbon capture and storage; Electric variables; Geometry; Kinetic theory; MOS devices; Plasma density; Plasma properties; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma Process-Induced Damage, 1999 4th International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-9651577-3-3

Type

conf

DOI

10.1109/PPID.1999.798816

Filename

798816

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3242333