EMPAR: an interactive synthesis environment for hardware emulations

Author

Lee, Tsing-Gen ; Fang, Wen-Jong ; Wu, Allen C H

Author_Institution

Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan

fYear

1995

fDate

29 Aug-1 Sep 1995

Firstpage

87

Lastpage

92

Abstract

In this paper, we present EMPAR, an interactive synthesis environment for hardware emulations. EMPAR provides an open-ended design environment for the development of hardware emulators, which is capable of supporting: (1) a variety of EM architectures (2) a variety of EM synthesis algorithms, (3) interactive control by the user, and (4) design quality analysis. An X-window based graphical user interface has been developed to support a variety of interactive design tasks. The key features in EMPAR are: (1) it is open-ended so that arbitrary algorithms and tools can be built on top of it and (2) it is fully interactive and leaves the control to the designer. EMPAR can be used as a design environment for existing hardware emulators as well as a test bed for the evaluation and development of new hardware-emulator architectures and synthesis algorithms

Keywords

high level synthesis; interactive systems; logic design; EMPAR; design environment; design quality analysis; graphical user interface; hardware emulations; hardware emulators; interactive design; interactive synthesis environment; test bed; Algorithm design and analysis; Application specific integrated circuits; Design automation; Emulation; Field programmable gate arrays; Hardware; Logic; Partitioning algorithms; Process design; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal

Conference_Location

Chiba

Print_ISBN

4-930813-67-0

Type

conf

DOI

10.1109/ASPDAC.1995.486207

Filename

486207