DocumentCode
3248415
Title
Multi-level equivalence in design transformation
Author
Cheung, Tommy King-Yin ; Hellestrand, Graham R.
Author_Institution
Sch. of Comput. Sci. & Eng., New South Wales Univ., Kensington, NSW, Australia
fYear
1995
fDate
29 Aug-1 Sep 1995
Firstpage
559
Lastpage
566
Abstract
This paper introduces the notion of multi-level equivalence in transformational synthesis of hardware or software. Two distinct, but interrelated levels of equivalence (behaviour and function-equivalence) are supported in this formalism. This would allow either or both the behaviour and functionality of the original function specification to be preserved during automatic synthesis which is typically based on a series of applications of equivalent transformation mechanisms. In essence, this formalism makes possible the evolution of behaviours while maintaining the functionality. This has extended the traditional view of synthesis through refinement to synthesis through exploration and evolution
Keywords
algebraic specification; formal specification; hardware description languages; high level synthesis; logic design; automatic synthesis; behaviour; design transformation; equivalent transformation mechanisms; function specification; function-equivalence; functionality; multi-level equivalence; transformational synthesis; Australia; Computer science; Concurrent computing; Delay; Design engineering; Laboratories; Paper technology; Performance analysis; Space exploration; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location
Chiba
Print_ISBN
4-930813-67-0
Type
conf
DOI
10.1109/ASPDAC.1995.486370
Filename
486370
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