ePAPP: a gigabit embedded protocol analyzer pre-processor

Author

Hoare, Raymond R. ; Yu, Ying ; Repanshek, Jacob J.

Author_Institution

Dept. of Electr. & Comput. Eng., Pittsburgh Univ., PA, USA

fYear

2005

fDate

7-10 Aug. 2005

Firstpage

59

Abstract

Network has been growing rapidly in both transmission bandwidth and transmission speed. This increase in speed reduces processing time a network device has for each packet. This paper presents a hardware embedded protocol analyzer pre-processor (ePAPP) that performs the protocol analysis of network packets. It replaces the software protocol analysis program running on processors, with a significant performance increase, and protocol adaptation flexibility. A prototype of ePAPP supporting various protocols including Ethernet, IPv4, ARP, TCP, and UDP, has been designed in VHDL and synthesized. When implemented on the NEC instant silicon solutions platform (ISSP), a structured ASIC technology based on 0.13-micron process, ePPAP can achieve 2.88 Gb/s processing rate, using less than 1% of available logic cells.

Keywords

application specific integrated circuits; embedded systems; microprocessor chips; network analysers; 0.13 micron; 2.88 Gbit/s; ASIC technology; ePAPP preprocessor; embedded protocol analyzer pre-processor; instant silicon solutions platform; network devices; protocol analysis; transmission bandwidth; transmission speed; Bandwidth; Ethernet networks; Hardware; National electric code; Network synthesis; Performance analysis; Protocols; Prototypes; Software performance; Software prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. 48th Midwest Symposium on

Print_ISBN

0-7803-9197-7

Type

conf

DOI

10.1109/MWSCAS.2005.1594039

Filename

1594039