DocumentCode
3249956
Title
An RNS-Enhanced Microprocessor Implementation of Public Key Cryptography
Author
Lim, Zhining ; Phillips, Braden J.
Author_Institution
Univ. of Adelaide, Adelaide
fYear
2007
fDate
4-7 Nov. 2007
Firstpage
1430
Lastpage
1434
Abstract
This paper presents a new residue number system implementation of the RSA cryptosystem. The system runs on a low-area, low-power microprocessor that we have extended with hardware support for residue arithmetic. When compared against a baseline implementation that uses non-RNS multi-precision methods, the new RNS implementation executes in 67.7% fewer clock cycles. The hardware support requires 42.7% more gates than the base processor core.
Keywords
microprocessor chips; public key cryptography; residue number systems; RSA cryptosystem; baseline implementation; microprocessor implementation; public key cryptography; residue arithmetic; residue number system; Arithmetic; Australia; Costs; Dynamic range; Hardware; Microprocessors; Processor scheduling; Public key; Public key cryptography; Reduced instruction set computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on
Conference_Location
Pacific Grove, CA
ISSN
1058-6393
Print_ISBN
978-1-4244-2109-1
Electronic_ISBN
1058-6393
Type
conf
DOI
10.1109/ACSSC.2007.4487465
Filename
4487465
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