FPGA based on board computer for LEO satellites

This paper presents a design for an embedded on board computer that can be used in LEO satellites based on FPGA technology. The design makes use of the multi-core concept provided by modern FPGA´s through soft IP cores. The used FPGA is Xilinx V5 FX70, it includes 1 PowerPC 440 processor implemented as hardcore. The rest of processors are Microblaze processors V7.30, implemented as soft IP cores. The design includes number of soft IP cores to facilitate inter processor communication as will be described in the text. It is expected that this system can be used as a configurable on board computer that can make use of the currently available FPGA technology for multi-core processors. Triple modular redundancy with feedback is applied in the system design to provide mitigation against Single Event Upsets. The system is functioning well; however space qualification is needed through irradiation testing and real mission.