A new storage node pad formation technology-line type SAC with oxide spacer (LSOS) and direct metal plug (DMP)-for 0.115 /spl mu/m tech and beyond

Author

Yoon, K.H. ; Park, S.C. ; Lee, M.S. ; Huh, M. ; Bae, Y.H. ; Kim, S.I. ; Kim, J.W. ; Yoon, H.K.

Author_Institution

Memory R&D Div., Hyundai Electron. Ind. Co. Ltd., Ichon, South Korea

fYear

2001

fDate

12-14 June 2001

Firstpage

129

Lastpage

130

Abstract

A line type self-aligned contact (SAC) with oxide spacer (LSOS) and direct metal plug (DMP) were designed and developed as a storage node pad formation technology. This paper describes the physical and electrical characteristics of this new storage node pad formation process including the overall integration scheme for DRAM cells with a minimum feature size of 0.115 /spl mu/m and provides comparative analysis with other storage node pad formation techniques.

Keywords

DRAM chips; dielectric thin films; electrical contacts; integrated circuit interconnections; integrated circuit metallisation; 0.115 micron; DMP; DRAM cells; LSOS; SAC; SiO/sub 2/; direct metal plug; electrical characteristics; integration scheme; line type SAC; line type self-aligned contact; minimum feature size; oxide spacer; physical characteristics; storage node pad formation process; storage node pad formation techniques; storage node pad formation technology; Atherosclerosis; Electric variables; Electronics industry; Etching; Image storage; Material storage; Parasitic capacitance; Plugs; Research and development; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on

Conference_Location

Kyoto, Japan

Print_ISBN

4-89114-012-7

Type

conf

DOI

10.1109/VLSIT.2001.934983

Filename

934983