• DocumentCode
    3263950
  • Title

    Video processing for single-chip DVB decoder

  • Author

    Brett, Maik ; Gerstenberg, Bernhard ; Herberg, Christian ; Shavit, Gadi ; Liondas, Herbert

  • Author_Institution
    Micronas Semicond. GmbH, Munich, Germany
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    82
  • Lastpage
    83
  • Abstract
    This paper deals with aspects of video processing for DVB decoder chips. The proposed architectures were implemented in a new DVB decoder IC. This IC comprises all units required for DVB decoding like system demux, MPEG video and audio decoder. To connect external devices it offers an ATAPI bridge, an IEEE1394 port, and other interfaces. Conventional analog video is supported by an integrated color decoder and text slicer. The analog inputs and outputs allow an easy integration in hybrid set-top box applications and integrated digital TV (IDTV) chassis. The first silicon was fabricated using 0.18-μm eDRAM technology
  • Keywords
    DRAM chips; decoding; digital signal processing chips; digital video broadcasting; television receivers; video signal processing; 0.18 micron; ATAPI bridge; DVB decoder IC; DVB decoding; IDTV; IEEE1394 port; MPEG video decoder; architectures; audio decoder; color decoder; conventional analog video; eDRAM technology; hybrid set-top box applications; integrated digital TV chassis; single-chip DVB decoder; system demux; text slicer; video processing; Application specific integrated circuits; Consumer electronics; Control systems; Decoding; Digital TV; Digital video broadcasting; Firewire; Graphics; SDRAM; Video recording;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, 2001. ICCE. International Conference on
  • Conference_Location
    Los Angeles, CA
  • Print_ISBN
    0-7803-6622-0
  • Type

    conf

  • DOI
    10.1109/ICCE.2001.935220
  • Filename
    935220