• DocumentCode
    3266768
  • Title

    A synthesis method for MVL reversible logic [multiple value logic]

  • Author

    Miller, D. Michael ; Dueck, Gerhard W. ; Maslov, Dmitri

  • Author_Institution
    Dept. of Comput. Sci., Victoria Univ., BC, Canada
  • fYear
    2004
  • fDate
    19-22 May 2004
  • Firstpage
    74
  • Lastpage
    80
  • Abstract
    An r-valued m-variable reversible logic function maps each of the rm input patterns to a unique output pattern. The synthesis problem is to realize a reversible function by a cascade of primitive reversible gates. In this paper, we present a simple heuristic algorithm that exploits the bidirectional synthesis possibility inherent in the reversibility of the specification. The primitive reversible gates considered here are one possible extension of the well-known binary Toffoli gates. We present exhaustive results for the 9! 2-variable 3-valued reversible functions, comparing the results of our algorithm to optimal results found by breadth-first search. The approach can be applied to general m-variable, r-valued reversible specifications. Further, we show how the presented technique can be applied to irreversible specifications. The synthesis of a 3-input, 3-valued adder is given as a specific case.
  • Keywords
    adders; logic design; logic gates; multivalued logic; MVL reversible logic synthesis method; adder; bidirectional synthesis; binary Toffoli gates; logic function input/output mapping; m-variable r-valued reversible specifications; primitive reversible gate cascade; CMOS technology; Circuit synthesis; Computer science; Heuristic algorithms; Logic circuits; Logic functions; Niobium; Optical computing; Power dissipation; Quantum computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on
  • ISSN
    0195-623X
  • Print_ISBN
    0-7695-2130-4
  • Type

    conf

  • DOI
    10.1109/ISMVL.2004.1319923
  • Filename
    1319923