DocumentCode
3268582
Title
Equalization in FPGA-based realization of a multicarrier modem core
Author
Marinova, G. ; Bellanger, M. ; Guliashki, V.
Author_Institution
Tech. Univ. - Sofia, Sofia
fYear
2007
fDate
5-8 Aug. 2007
Firstpage
795
Lastpage
798
Abstract
The paper presents a study on the realization of equalizer IP (intellectual property) blocks for FPGA-based realization of multicarrier modem cores applying filter bank based principle and OQAM modulation. New equalization IP blocks with appropriate architectures for two different modem applications are proposed - following the ADSL standard and according to the 802.11 wireless communication standard (WiFi). We estimated the impact of equalization IPs on the frequency, the area efficiency and the SNR of the FPGA-based modem realizations.
Keywords
digital subscriber lines; equalisers; field programmable gate arrays; modems; quadrature amplitude modulation; wireless LAN; 802.11 wireless communication standard; ADSL standard; FPGA-based realization; OQAM modulation; equalization; equalizer IP blocks; filter bank; intellectual property; multicarrier modem core; Circuits; Communication standards; Equalizers; Field programmable gate arrays; Filter bank; Frequency estimation; Intellectual property; Modems; Transmitters; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium on
Conference_Location
Montreal, Que.
ISSN
1548-3746
Print_ISBN
978-1-4244-1175-7
Type
conf
DOI
10.1109/MWSCAS.2007.4488696
Filename
4488696
Link To Document