• DocumentCode
    3270466
  • Title

    Publicly detectable techniques for the protection of virtual components

  • Author

    Qu, Gang

  • Author_Institution
    Inst. for Adv. Comput. Studies, Maryland Univ., College Park, MD, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    474
  • Lastpage
    479
  • Abstract
    Highlighted with the newly released intellectual property (IP) protection white paper by VSI Alliance, the protection of virtual components (VCs) has received a large amount of attention recently. Digital signature is one of the most promising solutions among the known protection mechanisms. However, the trade-off between hard-to-attack and easy-to-detect and the lack of efficient detection schemes are the major obstacles for digital signatures to thrive. In this paper, we propose a new watermarking method which (i) allows the watermark to be public detected without forensic experts, (ii) gives little advantage to attackers for forgery, and (iii) does not lose the strength of protection provided by other watermarking techniques. The basic idea is to make part of the watermark public. We explain the concept of this public-private watermark and discuss the generation and embedding of such marks. We use popular VLSI CAD problems, namely technology mapping, partitioning, graph coloring, FPGA design, and Boolean satisfiability, to demonstrate its easy detectability, high credibility, low design overhead, and robustness. Finally, this technique is compatible with all the known watermarking and fingerprinting techniques.
  • Keywords
    Boolean functions; VLSI; cellular arrays; circuit CAD; copy protection; field programmable gate arrays; graph colouring; industrial property; logic CAD; Boolean satisfiability; FPGA design; VLSI CAD; credibility; design overhead; forgery; graph coloring; intellectual property; partitioning; public-private watermark; publicly detectable techniques; robustness; technology mapping; virtual components; watermarking method; Design automation; Digital signatures; Field programmable gate arrays; Forensics; Forgery; Intellectual property; Protection; Robustness; Very large scale integration; Watermarking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings
  • ISSN
    0738-100X
  • Print_ISBN
    1-58113-297-2
  • Type

    conf

  • DOI
    10.1109/DAC.2001.156186
  • Filename
    935555