DocumentCode
3273700
Title
An artificial neural network accelerator for pulse coded model-neurons
Author
Frank, G. ; Hartmann, G.
Author_Institution
Dept. of Electr. & Electron. Eng., Paderborn Univ., Germany
Volume
4
fYear
1995
fDate
Nov/Dec 1995
Firstpage
2014
Abstract
The following report introduces the hardware design of a neuro-computer aligned to simulate large neural nets consisting of pulse-coded model neurons. The simulation process is carried out in real-time, referring to image processing. A single accelerator provides 32k neurons with 128 synapses each. There is no need to assign a fixed number of synaptic weights to each neuron rather then distributing the total amount of four million synapses arbitrary to any neuron. The simulation of larger nets is possible by connecting the accelerators in a hexagonal structure, where the simulation time will only increase if the overall activity of the net mainly effects one specific accelerator board
Keywords
computer vision; image processing; neural nets; object recognition; real-time systems; computer vision; image processing; neural network accelerator; neuro-computer; object recognition; pulse coded model-neurons; real-time system; simulation process; synaptic weights; Artificial neural networks; Biological system modeling; Computational modeling; Electron accelerators; Hardware; Humans; Joining processes; Neurons; Object recognition; Visual system;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1995. Proceedings., IEEE International Conference on
Conference_Location
Perth, WA
Print_ISBN
0-7803-2768-3
Type
conf
DOI
10.1109/ICNN.1995.488982
Filename
488982
Link To Document