DocumentCode
3274117
Title
Optimization of 90nm Split Gate Nanocrystal Non-Volatile Memory
Author
Yater, Jane A. ; Kang, S.-T. ; Steimle, R. ; Hong, C.M. ; Winstead, B. ; Herrick, M. ; Chindalore, G.
Author_Institution
Freescale Semicond., Austin
fYear
2007
fDate
26-30 Aug. 2007
Firstpage
77
Lastpage
78
Abstract
A 90 nm split gate nanocrystal bitcell has been demonstrated with scaled select gate oxide and adjustable control gate threshold voltage that allows for fast, low power SSI operation and top erase. This bitcell performance is excellent and holds promise for embedded flash applications.
Keywords
flash memories; random-access storage; SSI operation; bitcell performance; embedded flash applications; optimization; scaled select gate oxide; size 90 nm; split gate nanocrystal nonvolatile memory; Breakdown voltage; CMOS technology; Character generation; Electron traps; Etching; Human computer interaction; Implants; Nanocrystals; Nonvolatile memory; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2007 22nd IEEE
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0753-2
Electronic_ISBN
1-4244-0753-2
Type
conf
DOI
10.1109/NVSMW.2007.4290588
Filename
4290588
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